amjs澳金沙门(集团)有限公司

    Mailbox verification
    Your email:
    Verification Code:

        The SLP74LVC3G14 is triple inverting buffers with Schmitt trigger input.

        The SLP74LVC3G14 is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Schmitt trigger action at the inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.


    Main feature
    • 5V tolerant input/output for interfacing with 5V logic

    • Balanced propagation delays

    • CMOS low power consumption

    • ±24mA output driver (VCC=3.0V)

    • ESD protection:

    • HBM Exceeds 2000V

    • CDM Exceeds 1000V

    • Latch-up performance exceeds 100mA

    • Specified from -40°C to +85°C and from -40°C to +125°C


    Ordering Information
    Product Name Package form Marking Hazardous Substance Control Packing Type Remarks
    SLP74LVC3G14JWTR VSSOP-8-100-0.5 3G14 Halogen free Tape&Reel
    Block Diagram

    SLP74LVC3G14 中英同(4500&1725).png

    Documents
    title Types of Size (KB) date Download the latest English version
    SLP74LVC3G14 0 1970-01-01 SLP74LVC3G14 Brief Datasheet
    友情链接: